Computing applications used in semiconductor design and manufacturing have ever-increasing requirements for speed, accuracy and reliability as the leading-edge nodes – fueled by high-performance computing and deep learning – enter the 5-nm era. These applications include inverse lithography technology (ILT) to produce curvilinear shapes on photomasks, mask process correction (MPC) for multi-beam mask writing to process these incredibly complex mask shapes, curvilinear mask and wafer simulation and verification, and deep learning for photomask and semiconductor manufacturing. D2S software applications are based on NVIDIA CUDA, a parallel computing platform and programming model for GPUs. The newest-generation computational design platform (CDP) with GPU acceleration from D2S offers 1.8 PFLOPS (SP) of computing power in a one-rack CDP – enabling simulation-based accurate manipulation and analysis, particularly for curvilinear shapes, which are not possible with CPU-only applications.
From creating and processing complex mask shapes to helping to write the masks and analyzing mask SEM data to providing deep learning engines, D2S GPU-accelerated solutions help customers to achieve manufacturing success on their leading-edge mask and chip designs.
For more than a decade, the semiconductor industry has recognized that curvilinear shapes on photomasks computed by ILT produce the best wafer quality, but adoption has been hindered by long mask write times using conventional variable-shaped beam (VSB) writing, as well as long ILT runtimes on CPU-based computing platforms. The latest-generation D2S CDP, which utilizes the NVIDIA A40 GPU, makes implementing and verifying curvilinear ILT a practical reality.
The nature of neural network computing is very well suited for GPU acceleration — even for inferencing in production use after the neural network has been programmed. GPU acceleration is particularly necessary when the neural network is being trained, as a very large amount of data is necessary to properly program the network through repeated execution of trial and error.
Reliability is always a key concern for any computing platform. The cleanroom-proven D2S CDP keeps mission-critical production lines up and running and minimizes costly downtime.
A computing platform with mean-time-between-failures and mean-time-to-repair good enough for the cleanroom is ready for any deployment in semiconductor manufacturing. In fact, semiconductor manufacturing leaders have deployed the D2S CDP in more than 40 installations worldwide.
“The entire semiconductor industry faces increasingly difficult challenges with each new process node. GPU acceleration has inevitably become the industry standard for computational lithography, and we look forward to leveraging the manufacturing benefits of D2S’s latest generation solution, based on the NVIDIA Ampere architecture, for our own future products”
