D2S Wafer Plane Analysis Engine
When CDU was a one-dimensional problem, CD SEM alone was sufficient for verification. Today, however, non-orthogonal patterns and complex shapes, including ILT shapes, present a two-dimensional (2D) challenge. In addition, with these complex mask patterns comes an increase in the number of mask defect issues flagged during mask inspection. But not all of these mask issues will result in a problem on the wafer, so mask shops need to understand the wafer-level impact of mask-level issues.

The D2S Wafer Plane Analysis Engine uses D2S GPU-acceleration technologies to provide aerial image simulation of 2D contours extracted by CD SEM machines at interactive speeds.

Figure - D2S Wafer Plane Analysis Engine verifies wafer CDU



Benefits
  • Enables CD metrology for complex mask shapes, including ILT shapes
  • Speeds wafer-level CD metrology through GPU-accelerated aerial simulation
  • Reduces the cost of a wafer-level CD metrology solution as compared to optics-based aerial plane CD metrology tools
  • Provides highly repeatable wafer-level CD metrology results based on CD SEM contours
  • Integrates with industry-standard CD metrology tools for easy adoption and use
  • Reduces the load of aerial image review equipment during post-inspection mask dispositioning through more accurate defect review
  • Improves post-inspection mask dispositioning by using industry-standard, high-resolution SEM images for defect details and resolution, and by using simulated aerial image for defect printability
  • Expands to support other CD SEM and SEM repair tools

“We’re pleased to be working with D2S on developing a joint solution to improve mask CDU analysis, which results in a better quality mask for our customers. Combining D2S’ expertise in GPU-accelerated simulation technologies with our leading-edge CD-SEM tools—such as our new E3640—allows us to provide a cost-effective platform for extremely fast lithography simulation.”
– Takayuki Nakamura, Executive Officer, General Manager of Nanotechnology Business Division, Advantest


Press Release (PDF)
Data sheet for D2S Wafer Plane Analysis Engine For Advantest MVM-SEM® E3640 (PDF)
Video on wafer plane analysis by Ed Sperling, Semiconductor Engineering, and Leo Pang, D2S